Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification
Overview & Synopsis
This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design, along with the many worked examples, new synthesis standards and coverage of the OVI verification library.
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Document Information
| Document Title | Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification |
|---|---|
| Author / Organization | Zainalabedin Navabi |
| Subject & Discipline | Electronics Circuit Design and Programming, Hardware Description Language (HDL), VHDL, Verilog, etc., Electronic Engineering |
| Categories | Electronics Circuit Design and Programming |
| ISBN | 0071445641 |
| Resource Verification | Verification pending |
| Original Host Website |
FreeComputerBooks.com
(freecomputerbooks.com)
|
| File Format | application/pdf (Portable Document Format) |
| Language | ENGLISH |
| Catalog ID | DOC-40696 |
| Original Source Link | Visit Source Page on freecomputerbooks.com » |
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