Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models
Overview & Synopsis
This paper outlines a methodology for modeling photovoltaic systems in embedded hardware. This methodology uses the HiLeS platform to transform SysML models in Petri nets and generate VHDL code. The proposed methodology is intended for Hardware-in-the-Loop simulations of power converters and PV panels in microgrids. In addition, this methodology allows the design of MPPT controllers for their direct implementation in FPGA
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hal.science)
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Document Information
| Document Title | Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models |
|---|---|
| Author / Organization | A. Gutierrez, Harold Chamorro, J. Jimenez, Luiz Fernando Lavado Villa, Corinne Alonso |
| Subject & Discipline | Multidisciplinary Academic Open Research |
| Categories | Science & Mathematics |
| Publication Year | 2015 |
| License / Rights | Open Access / Creative Commons |
| Resource Verification | Listed PDF (Verification Pending) |
| Original Host Website |
HAL Open Science
(hal.science)
|
| File Format | application/pdf (Portable Document Format) |
| Language | EN |
| Catalog ID | DOC-140085 |
| Original Source Link | Visit Source Page on hal.science » |